Why I am Using the GateMate FPGA
This article reviews why I am using the GateMate FPGA in preference to other FPGAs.
AMD/Xilinx is the market leader in FPGAs. They have great products, but they are very expensive. No thanks.
Intel/Altera is the next most famous vendor, but their tools kept crashing on me. No thanks.
Lattice ICE40 has a lot of users, open source development tools, and great communities. I have been using the largest ICE40 device, the $8 UP5K chip on the $38 Pico-Ice board. It has eight 16 bit multipliers. The synthesis tools are open source, fast, and after years of use, I never found a single bug in them. It is perfect for education, and hobbyists. The problem is that the device is just too slow to be competitive. The $5.00 Milk-V duo runs at a gigahertz, it can execute 400 Mega Forth instructions per second. The UP5K chip, even when running at 8 level parallelism, has a maximum multiplier frequency of 50Mhz, giving an upper bound of 400 MegaOperations per second. And my designs are not able to even reach that frequency. Much better to just use the Milk-V duo devices. In most cases, even the 135Mhz 7€ RP2040 with PIO will do just as good a job and has way more software available than the ICE40 chips. ICE40 is for education and hobbyists.
GateMate is a 21€ chip running on the 50€ Olimex GateMate A1-EVB board. Just 12€ more expensive than the pico-ice board, but way faster and much larger. Both boards have the much loved RP2040 microcontroller. That supports multiple USB interfaces, and huge amounts of software including MicroPython and CircuitPython. The best part is the FPGA itself. Reading the documentation gives one a strong sense that this was intelligently engineered by the Germans. In contrast the ICE40 FPGAs now feel very simplistic. When connecting to the RP2040 chip one has to deal with crossing clock domains. The topic is a complex one, well beyond the scope of this article, but the GateMate CPU has a very elegant solution. It supports asynchronous FIFO queues. One passes messages between the two chips and their different clock domains, and the FIFO queues manage the synchronization. Just awesome. GateMate also has a great solution for DSP. Most FPGAs have fixed size DSP blocks. They are usually too large or too small. GateMate has hard core two bit adders and multipliers with fast interconnects, so that any size math operation can be implemented. And for those of us living in Europe, the EU wisely protects its domestic semiconductor industry with tariffs on other countries FPGAsm so the Olimex Gatemate board is less expensive here. If/when China invades Taiwan, we will still be able to get our supply chain will still provide GateMate FPGAs. Discord, Awesome GateMate.
Lattice ECP5. This is another interesting platform, with good reputation and good open source tooling. But they are a bit more expensive. And lack the CDC FIFO queue. One user told me that the 21€ Gatemate A1 board compares very roughly, to Lattice ECP5-5G LFE5UM5G-45 53€-83€ at digikey,com plus EU import duties.
Lattice Crosslink NX. Another very interesting chip with more memory. It has 2.6Mbits of memory. If you need USB hard core, then I do recommend it. But the cheapest board I could find was the Crosslink NX evaluation board for $129 from Lattice. Also I heard reports from a Lattice user, that the Lattice Radiant synthesis tools require an FTDI chip. I prefer to use boards with the cheaper, and more flexible rp2040 chip.
Gowin is a very cost effective with huge memories. The problem is with the large memories. They are SDRAMs. Latency is 3 clock cycles, it is inaccessible when the memory is being refreshed, and with bank interleaving, latency goes to 8 clock cycles. It is all so complicated, I am not sure I even got it right. But no thanks. Particularly for Forth stack machines with lots of subroutine calls, large latency is a killer.
Other FPGAs. There are an increasing number of other fPGA. No one can know them all. So far I am happy with GateMate. When I need larger memories, I plan to move to the Lattice Crosslink NX family.
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