Saturn Sultan îs a Forth compiler, interpreter and hardware packaging solution running on the $42 Pico2 Ice, on the $100 ICE-V Wireless board, or ported to your favorite FPGA board. Its market niche is hardware testing and debugging. it is also great for people who want a simple development environment, free of excess layers of abstraction.

For the pico-ice, a case with exposed ports for the various connection options will be provided. A 'board' variant with an integrated 40 key keyboard not unlike the original Jupiter Ace is also planned.

• 16 bit words.
• 256 deep data and return stacks.
• 64K words of on chip memory on the ICE40 UP5K FPGA.
• Single Clock Cycle per Forth Instruction (Arm takes 2-3 clock cycles per ARM assembly instruction).
• Single clock cycle interrupts.
• Compact Programs (2 Bytes/Forth Instruction. (Gforth takes 19-23 32 bit ARM ASM words per Forth instruction).
• Single step debugging from the second core.
• Based on the Industry proven, open source Mecrisp Ice J1 soft core.
• Well documented.
• Hardware Error Checking.
• 214 line cross-compiler (GCC is 13 million lines).
• Access to vast C libraries on the Microcontroller.
• USB-C 2.0 power and control.
• 3 FPGA PMODs.
• Mac OS and Linux simulators available.

Pico2 Ice Version

• 150 Mhz RP2350 MCU.
• DVI output.
• 1 Additional RP2350 PMOD (USB Host mode possible via PIO).
• 2 Quad DDR SPI RP2350 <-> FPGA interfaces at 75Mhz (Full Duplex).
• FPGA Flash.

ICE-V Wireless Version

• 66 Mhz ESP32-C3.
• Wifi.
• Bluetooth.
• Battery and charging circuitry.
• 60 Mhz Quad SPI ESP32 <-> FPGA Interface (Hałf Duplex).
• FPGA external RAM.

Coming later than expected to a Git repository near you.

Benefits

When debugging hardware, an interpreter is invaluable. The other big benefit is simplicity. The libraries and cross compiler are quite small, making the system both understandable, and easily modifiable.

Applications built with this technology require 60% less memory than applications built on RISC-V, Since off-chip memory access requires more than 100 times as much power as on-chip memory access, this can lead to dramatic power savings.

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